The teachings of the present invention relate to an amplifying device having a bypass mode and an amplifying mode of operation.
Amplifiers are frequently used in communications applications, and specifically wireless telecommunications. By way of example, mobile phones for wireless communications require high performance amplifiers as part of a receiver and transmitter circuitry. A function of the amplifier is to accept the signal transmitted by a base station, perform an adjustment so that the maximum amplitude frequency component of the signal falls within a predetermined optimum range, and relay the signal to decoding circuitry. Accordingly, it is desirable for the amplifying device to perform its function without degradation of the received signal. In particular, it is desirable for the amplifying device to have low noise figure and high linearity. It is further desirable for the amplifying device to be able to perform its function over a large dynamic range in signal amplitude. An ability to receive signals over a large dynamic range enables the mobile phone receiver to accommodate both near and far transmitted signals as well as to accommodate and receive desired small amplitude signals in the presence of high amplitude jamming or interfering signal. Achieving a high degree of amplifier linearity at over a large dynamic range presents a technical challenge in the prior art. Conventionally, therefore, a switched amplifying device for use in a wireless telecommunications receiver may have a bypass mode and an amplifying mode and two single pole double throw switches at the input and output of the amplifier to select the appropriate gain mode for use at any point in time. The bypass mode for purposes of the present patent application is defined as either a direct through connection having little loss and no amplification or a fixed or variable attenuation stage. Specifically, the bypass mode is used when the amplitude of the received signal is relatively high. For a received signal of significant amplitude, it is undesirable to further amplify the signal because the amplified signal will be out of the optimum signal amplitude range of the circuitry. Accordingly, the bypass mode is appropriate when low loss, low noise figure, and high linearity are desirable features. For a weak received signal, it is desirable to amplify the signal to place the signal within the optimum signal amplitude range of the circuitry. For the amplifying mode, high gain, high linearity, and low noise figure are desirable features.
In order to achieve the desired features, conventionally, a switched amplifying device is placed in series with a first and second single pole, double throw switch (3,4), as shown in FIG. 1 of the drawings. For the bypass mode, each switch connects an RF input port (1) to an RF output port (2) through a bypass circuit (5). For the amplification mode, each switch (3,4) toggles to connect the RF input port (1) to the RF output port (2) through a switched amplifying device (6). Disadvantageously, in the bypass mode the series switches (3,4) cause some signal loss and increase the noise figure before the signal is amplified, thereby reducing the overall receiver system sensitivity. Disadvantageously, in the amplification mode, the series switches (3,4) increase the noise figure of the overall amplifying system, and consequently the receiver system, due to the switch loss at the input of the switched amplifying device.
There is a need, therefore, to further reduce the system noise figure in the amplifying device while increasing the dynamic range over which the amplifying device operates.
It is an object of an embodiment of the invention to provide an amplifying device having a low noise figure.
It is another object of an embodiment of the invention to provide an amplifying device capable of receiving and processing RF signals over a wide dynamic range in received signal amplitude.
An amplifying device disposed between an RF input and an RF output having an amplification mode and a bypass mode comprises an amplifying FET. The amplifying FET is electrically disposed in parallel with a bypass device. The amplifying FET has an on state in the amplification mode and an off state in a bypass mode.
It is a feature of an embodiment of the present invention that the amplifying FET draws no supply current in the bypass mode.
It is a feature of an embodiment of the present invention that an amplifying device is electrically connected in parallel with a bypass device.
It is a feature of an embodiment of the present invention that an amplifying FET has an on state in the amplification mode and an off state in the bypass mode.
It is a feature of an embodiment of the present invention that the bypass device may comprise a bypass switch or an attenuator.
It is a feature of an embodiment of the present invention that the bypass switch has an off state in the amplification mode and an on state in the bypass mode.
It is an advantage of an embodiment of the present invention that an amplifying device has a lower noise figure than prior art amplification devices having a similar amplitude dynamic range.
It is an advantage of an embodiment of the present invention that a switch is eliminated at an input port of an amplification device and, therefore, does not affect performance of the amplifier""s amplification mode.